AXI has become the most popular internal bus protocol with today’s FPGA and SoC FPGA designs. ALINT-PRO enables FPGA...
Event Articles
embedded world 2023
March 14th to 16th, 2023Hall 4 Stand 4-548The right tool for every development step From March 14 to 16, embedded...
FPGA Design – Verification Code, Functional and Specification Coverage
FPGA Design/Verification Best Practices for Quality and Efficiency 19. May 3:00 PM - 4:00 PM Functional coverage is...
FPGA Verification Architecture Optimization with UVVM
FPGA Design/Verification Best Practices for Quality and Efficiency 5. May 3:00 PM - 4:00 PM For most FPGA projects,...
FPGA Design Architecture Optimization
PGA Design/Verification Best-Practices for Quality and Efficiency 28 April 3:00 PM - 4:00 PM The FPGA design...
Using SVA for Requirements-Based Verification of Safety-Critical FPGA Designs
Thursday 10. March from 3.00 pm to 4.00pm Requirements-based verification (RBV) is a popular verification process for...
Increase your productivity with Continuous Integration flows
In a team environment, verification engineers push code changes every day, and sometimes several times a day, to a...
Protocol Analysis and Debug
Many systems today need additional external memory ie SRAM flash. Micro-controllers are using large parallel...
Constraint Random Verification with Python and Cocotb
Testing digital hardware has never been an easy job, and it won’t get easier any time soon. But that doesn’t mean...
UFS 4.0 Protocol Analysis and Validation Webinar
UFS stands for Universal Flash Storage. These specifications are developed jointly by the MIPI Alliance and JEDEC....
Webinar on Embedded System Development Using Agnisys
In this webinar we present the Agnisys way of developing embedded products. This provides a path that avoids many...
Using OVL for Assertion-Based Verification of Verilog and VHDL Designs
Open Verification Library (OVL) is a library of property checkers for digital circuit descriptions written in popular...