AXI has become the most popular internal bus protocol with today’s FPGA and SoC FPGA designs. ALINT-PRO enables FPGA...

AXI has become the most popular internal bus protocol with today’s FPGA and SoC FPGA designs. ALINT-PRO enables FPGA...
March 14th to 16th, 2023Hall 4 Stand 4-150The right tool for every development step From March 11 to 13, embedded...
FPGA Design/Verification Best Practices for Quality and Efficiency 19. May 3:00 PM - 4:00 PM Functional coverage is...
FPGA Design/Verification Best Practices for Quality and Efficiency 5. May 3:00 PM - 4:00 PM For most FPGA projects,...
PGA Design/Verification Best-Practices for Quality and Efficiency 28 April 3:00 PM - 4:00 PM The FPGA design...
Thursday 10. March from 3.00 pm to 4.00pm Requirements-based verification (RBV) is a popular verification process for...
In a team environment, verification engineers push code changes every day, and sometimes several times a day, to a...
Many systems today need additional external memory ie SRAM flash. Micro-controllers are using large parallel...
Testing digital hardware has never been an easy job, and it won’t get easier any time soon. But that doesn’t mean...
UFS stands for Universal Flash Storage. These specifications are developed jointly by the MIPI Alliance and JEDEC....
In this webinar we present the Agnisys way of developing embedded products. This provides a path that avoids many...
Open Verification Library (OVL) is a library of property checkers for digital circuit descriptions written in popular...
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