RTAX-S /SL support
RTSX-SU support
Automatic Netlist converter
ProASIC 3 bases

Aldec, Inc.

Aldec, Inc. is an industry-leading Electronic Design Automation (EDA) company delivering innovative design creation, simulation and verification solutions to assist in developing complex FPGA, ASIC, SoC and embedded system designs. The quality of the products and the customer-oriented support particularly characterize Aldec. With an active user community of over 35,000, 50+ global partners, offices worldwide and a global sales distribution network in over 43 countries, the company has established itself as a proven leader within the verification design community.

RTAX / RTSX-Prototyping

Aldec’s RTAX / RTSX prototyping solution provides a reconfigurable platform for the Microsemi RTAX-S / SL, RTAX-DSP and RTSX-SU spacecraft design systems. Unlike traditional OTP (One Time Programmable) FPGAs that are suitable for space, the Aldec prototype adapter uses Microsemi ™ ProASIC3E FPGAs that allow designers to prototype their design with greater routing flexibility, more switches, lower power consumption, non-volatile reprogrammability and more netlist optimisation.

FPGA Embedded Solutions

Embedded systems have been in our cars, homes, cities, factories, etc. for years. They are in professional tools as well as personal appliances and entertainment devices. Embedded systems have long been dominated by microcontrollers and DSP processors, often with FPGA parts used as glue or control logic for various peripherals such as sensors and actuators. The TySOM embedded systems product line includes high-performance embedded prototyping boards that can create even more complex embedded systems.

Scalable HES™ Prototyping Platform

The Aldec HES™ prototyping platform offers SoC/ASIC hardware and software developers high quality FPGA-based HES boards using the latest and greatest FPGA chips – currently Xilinx® Virtex7® or UltraScale® families. It consists of large capacity multi-FPGA boards and is scalable from 8 to 633 million ASIC gates by using backplane boards with fully utilised LVDS and GTH/GTX interconnects. This makes it ideal for pre-silicon integration of the complete SoC or subsystem-level verification.