Aldec Event Articles

FPGA Design Architecture Optimization

The FPGA design architecture is the single most important and primary factor in achieving development efficiency, quality, and reliability. The difference between a good and a bad design architecture can be about 50% of the workload.

Using SVA for Requirements-Based Verification of Safety-Critical FPGA Designs

Thursday 10. March from 3.00 pm to 4.00pm Requirements-based verification (RBV) is a popular verification process for FPGA designs used in safety-critical systems. The effectiveness of RBV is limited by the quality and precision of the requirements. Verification...

Increase your productivity with Continuous Integration flows

In a team environment, verification engineers push code changes every day, and sometimes several times a day, to a shared repository. Each change has the potential to introduce new bugs into the design. Accordingly, when many changes are being made, it is difficult to...