The Standard Library of IP Generators (SLIP-G™) has proven to be very popular with users, and this is not surprising....
Agnisys Blog Articles
Automating the UVM Register Abstraction Layer (RAL)
It’s hard to think of any electronic design automation (EDA) innovation that’s had more impact than the Universal...
Automation of IP and SoC development
Agnisyshas expanded its original focus on register automation to encompass specification-driven design, verification,...
Automatically translate English description into SystemVerilog Assertions
Agnisys is very proud of its close cooperation with users. This goes far beyond the traditional...