Layout Analysis and Chip Finishing
Skipper® integrates with popular DRC and LVS tools to provide seamless layout analysis and troubleshooting in your design flow. The Skipper’s built-in resistance calculator extracts the point-to-point (P2P) equivalent resistance of a given network in a layout, calculates current density for better ESD path design and IR/EM analysis. The integrated P/G network tracking and short-time detection are valuable functions for developers of sophisticated process designs.
Skipper’s optimised multi-threaded algorithm and unique data structure enable the industry’s highest layout reading speed. Proprietary layout sharing technology enables 100 times faster loading of design data despite hardware IO limitations.
Skipper® is an ideal solution for merging GDS and OASIS layouts, editing layouts, generating isolated views, highlighting and saving meshes and other data manipulation functions. Essentially, Skipper provides powerful chip-level layout analysis in a user-friendly environment.