Standard Library of IP Generators
SLIP-G™ – In any System-on-Chip (SoC) design, certain standard IPs are nearly ubiquitous and are used across many designs. A designer, generally, has two alternatives – either to spend time creating these IPs from scratch to meet their custom requirements or get them off-the-shelf.
Standard Library of IP Generators (SLIP-G) from Agnisys offers configurable standard IP generators as an extension to its addressable register generator tool. These IPs are designed to be easily customizable and configurable to meet any SoC requirements.
Agnisys provides IPs such as GPIO, TIMER, I2C Master, PIC, AES, SPI and DMA, which can also be configured and customized as per the user’s need. These IPs appear in a drop-down menu on the IDesignSpec ribbon or on IDS NextGen (IDS-NG).
- Highly customizable and configurable
- Supports all IDS standard bus interfaces
- Hooks to custom glue logic
- Comes with standard APIs
- Tested, verified, and validated IPs